1. Field of the Invention
The invention relates to the field of power electronics.
It proceeds from a method for driving an electronic power converter circuit arrangement according to the preamble of the first claim. It relates, furthermore, to an electronic power converter circuit arrangement.
2. Discussion of Background
Such a method and an electronic power converter circuit arrangement have already been described, for example, in the article by A. Stamberger "Serie- oder parallelgeschaltete Hochleistungs- GTOs mit genau synchronisierter Abschaltung", ("Series- or parallel-connected high-power GTOs having a precisely synchronized turn off"), Elektroniker No. 3/1985, pages 68-72.
If the individual arms, for example, of a half-bridge contain series-connected power semiconductor switches (GTOs in the abovementioned article), this can lead to a bad, that is to say irregular voltage distribution. This can lead further to overloading of individual semiconductors of the series circuit. The reasons for this unequal loading reside in different turn-off times, differences in the parameters of the semiconductors and of the associated circuits, as well as parameter changes during operation.
In the above mentioned article, an attempt is made to balance the voltage loading of the individual switches by controlling the turn-off times of the control signals in such a way that all the GTOs of an electronic power converter arm start to block simultaneously. The instant of the turn-off signal is used as controlled variable.
However, only the turn-off time is exactly corrected thereby. Irregular voltage loadings due to parameter differences and parameter changes cannot be balanced, however, since it is not possible to provide any information on the exact voltage distribution. Moreover, the method previously explained acts only during switching, more precisely during turn-off. Differences in voltage loadings in the steady state of "blocking" still remain out of consideration, although these could occur because of parameter differences and parameter drift.
Consequently, the correction is incomplete and the utilization of the semiconductors is not optimal. In the case of applications in relatively large semiconductor modules (0.5 MVA switching capacity and more), this can have unfavorable effects.